Senior ASIC Architect
Nvidia
- Where
- Tel Aviv, IsraelThe listing doesn't say if it's on-site, hybrid or remote.
- Language, from the listing
- No Hebrew mentionedA missing mention doesn't mean Hebrew isn't needed. Ask if it matters to you.
- Dates
- Posted 29 Jun 2025
- Last checked on the employer's site
- 4 h ago (6 Oct 2026)
- Source
- Employer career site (Workday)
The full listing
NVIDIA networking unit is a world-leader fast-growing company which supports the most powerful supercomputers in the world. We make outstanding artificial intelligence happen and accelerate Open-AI’s Chat-GPT, for example. We believe in our people and products and seek excellent people to join us!
We're looking for a hardware u/architect for our switch division. In this position, as part of a small (~10 employees) elite team, you will have the chance to define the architecture of NVIDIA’s next generation switch product lines’ performance, both Ethernet and InfiniBand. Your role will be cross-disciplinary, working with software, ASIC design, verification, physical design and platform teams to improve performance and debug.
What you'll be doing:
• Learn and understand the switch u/architecture thoroughly across all aspects and become a source of information for the design and verification engineers.
• Define the implementation of the most sophisticated performance features of our next products, balancing architecture requirements with backend, execution, and design considerations.
• Define the implementation of debug capabilities to support performance validation and improvements
• Understand our system requirement and help define the POR of our switch product line.
• Face the most challenging Full-Chip correctness and performance issues, which cannot be handled by the units’ designers as they require full cross-unit understanding of the chip.
• Work closely with board and package design to understand the different design limitations: power, di/dt, temperature, signal-integrity etc.
• Thoroughly understand Ethernet, InfiniBand and NvLink protocols.
What we need to see:
• B.Sc. in Electrical Engineering from a known university
• Excellent grades
• 5+ years of experience in ASIC design/uarch/arch/performance
• At least 4 years of hands on experience in writing Verilog/VHDL or
• Strong analytic capabilities, and passion for solving logical issues
• Strong debug skills
• Ability to drive complex activities involving many interfaces and teams
• Good communications skill
Ways to stand out from the crowd:
• Knowledge in switching fabrics with strict performance requirements. (Networking, SOC connectivity, etc)
• Experience as an HW-architect.
• Familiar with working on large high-end ASICs.
• Experience in performance improvements in ASIC